1 shows an output stage of a lμm CMOS op-amp, where VDD=2.5V, MnCox = 100μA/V², VAI 100V (M1, M2?

... M3, M4), common mode gain = 0.001 and differential gain = 1000. The gate width of Ms is 250μm. The sizes of M₁ and M2 are the same. Besides, the Vin is limited between ±0.2V to keep the circuit with linear amplification.

Based on the above specifications and device parameters, please find the circuit parameters below:

(-) Find Ibias of Ms. (5%)

(=) Find the transconductor gm of M1,2. (5%)

(E) Find the gate width of M1,2. (5%)

(29) Find the gate width of M3,4. (10%)